CROSS-REFERENCE TO RELATED APPLICATION
This application is related to a co-pending patent application titled "Low-Power-Dissipation CMOS Oscillator Circuits", by T. J. Gabara, Ser. No. 08/165433, filed Dec. 13, 1994 and assigned to the same assignee as this application.
1. Field of the Invention
This invention relates to logic circuits generally and, more particularly, to clock generator circuits for driving logic gates disposed on a chip or any other capacitive load, such as liquid crystal displays or the like.
2. Description of the Prior Art
Microprocessors, digital signal processors (DSPs) and other synchronous digital logic circuits rely on a clock to maintain synchronization and control over operations therein. One limitation to the processing power of a processor embodied on a integrated circuit chip is the amount of power the processor can dissipate. The power limitations is established by the power the chip's packaging can dissipate based in part on the maximum temperature the chip can tolerate.
Similarly, in portable applications, battery capacity can limit the amount of power a chip can consume.
Most single chip processors are fabricated with complementary metal-oxide-semiconductor (CMOS) technology. CMOS is very power efficient. The amount of power a CMOS chip dissipates is approximately proportional to the product of the frequency or speed of the clock, the number of logic gates capacitively loading clock distribution network wiring on the chip and the square of the power supply voltage. It has been found that either the clock frequency must be limited to less than the maximum possible or the number of gates reduced on the chip to meet the power dissipation limitation in some instances. Alternatively, the power supply voltage may be reduced from a nominal five volts to 3.3 volts or less.
The most prevalent methods of reducing the power dissipation/consumption are to reduce the clock frequency or reduce the supply voltage. Obviously, these may not be practical or desirable in all circumstances. Thus, another approach is needed to reduce power consumption.